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Verifying the biological relevance of a neuromorphic hardware device

Background

Within the FACETS research project, a neuromorphic mixed-signal VLSI device was created [1]. It was designed to exhibit a linear correspondence with an I&F neuron model, including synaptic plasticity and short-term synaptic dynamics. It operates with a speedup factor of around 105 compared to biological real time. Utilizing the existing prototype, networks of up to 384 neurons and the temporal evolution of the weights of 105 synapses under STDP can be modeled.

Methods

We developed a software framework which allows a unified access to both the hardware system and the pure software neuro-simulator NEST, providing the possibility to verify that the chip can be operated in a biologically realistic regime. From within a single software scope, we can compare and post-process results obtained from both systems, based on identical input and network setups.

Results

We present experiments that illustrate the status of hardware neuron model verification by comparing its dynamics to NEST simulations. Exemplarily, Figure 1 shows the linear correspondence between the hardware and the software neuron model.

Figure 1
figure1

The membrane potentials of a single neuron under Poisson process input. The upper one has been simulated using NEST, the lower one is a digitization of the analog voltage trace of the neuromorphic hardware.

Conclusion

To establish neuromorphic hardware as a valuable tool for neuroscience, its biological correctness has to be proven. We provide a tool for the direct comparison of a specific hardware system and a simulation software. Our experimental data illustrates the functionality of the hardware and shows its biological relevance. The resulting uniform software interface will allow modelers to port existing network models to the hardware system with minimal effort.

References

  1. 1.

    Schemmel J, Brüderle D, Meier K, Ostendorf B: Modeling synaptic plasticity within networks of highly accelerated I&F neurons. Proceedings of the 2007 IEEE International Symposium on Circuits and Systems (ISCAS'07). 2007, IEEE Press

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Acknowledgements

This work is supported by the European Union under the grant no. IST-2005-15879 (FACETS).

Author information

Correspondence to Daniel Brüderle.

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Open Access This article is published under license to BioMed Central Ltd. This is an Open Access article is distributed under the terms of the Creative Commons Attribution 2.0 International License (https://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Keywords

  • Neuron Model
  • Hardware System
  • Network Setup
  • Realistic Regime
  • Synaptic Dynamic